1. Field of the Invention
The invention relates to a display device, and more particularly, to a display device which can automatically adjust its resolution.
2. Description of the Prior Art
Display devices are essential for converting video frame signals transmitted from a signal source, such as a computer, into a readable video picture. Over the years, they have evolved significantly from traditional cathode ray tube monitors to modern liquid crystal displays and projectors. Regardless of the type used, a display device has to provide different resolutions depending on the need. The resolution of a video picture is determined by the way video frame signals are processed by a display device. When the video picture displayed on a display device is blurry, a user has to manually adjust the resolution. This causes great inconvenience. Therefore, further research in display devices with automatically adjustable resolutions has become critical.
Please refer to FIG. 1. FIG. 1 is a block diagram of a prior art display device 12 receiving video frame signals from a computer 10. The display device 12 is connected with the computer 10 through a cable which comprises a plurality of signal lines for receiving video frame signals transmitted from the computer 10. The video frame signals include horizontal synchronization signals 14, vertical synchronization signals 15, and video signals 16. After receiving and processing the video frame signals, the display device 12 displays a video picture.
Please refer to FIG. 2. FIG. 2 is a video picture 21 of the display device 12 at a resolution of 800xc3x97600. When the display device 12 receives the horizontal synchronization signals 14 and the vertical synchronization signals 15, and is to display a video picture 21 at a resolution of 800xc3x97600 according to a sampling reference table, the display device 12 will display each pixel one by one from the first pixel 18 of the first horizontal scanning line 20 to the 800th pixel 19, and then move on from the first pixel 26 of the second horizontal scanning line 22 to the 800th pixel 28 and so on until the 800th pixel 29 of the 600th horizontal scanning line 24 is filled. The display device 12 will then display the next video picture.
Please refer to FIG. 3. FIG. 3 is a timing diagram of the video frame signals in FIG. 1. The horizontal synchronization signals 14, vertical synchronization signals 15, and video signals 16 are represented by HS, VS, and Video respectively. When the display device 12 receives a vertical synchronization signal 15, it starts to display a new video picture. Thus video signals 16 received after time t0 can be displayed from the first row of the video picture 21. Furthermore, when the display device 12 receives a horizontal synchronization signal 14, it starts to display a new horizontal scanning line. Thus, video signal 16 received after time t1 are displayed from the next row of the video picture 21. When the display device 12 has a resolution of 800xc3x97600 and receives a vertical synchronization signal 30, it will start to display the video picture 21 upon the receipt of a horizontal synchronization signal 32. It will display 600 horizontal scanning lines one by one, and will repeat the cycle when it receives the next vertical synchronization signal 34. Therefore, at this resolution, if the frequency of the vertical synchronization signals 15 is 72 Hz, the frequency of the horizontal synchronization signals 14 is roughly 48 kHz.
The prior art display device 12 such as an LCD monitor or a projector uses a sampling reference table to obtain a resolution of a video picture. The sampling reference table comprises the frequency of the horizontal synchronization signals 14 and resolutions. When the display device 12 receives the video frame signals from the computer 10, the display device 12 receives the frequency of the horizontal synchronization signals 14 at the same time, and uses it to check the sampling reference table to obtain a corresponding resolution. If the frequency of the horizontal synchronization signals 14 is 48 kHz, the detected resolution is 800xc3x97600. If the frequency of the horizontal synchronization signals 14 is 56 kHz, the detected resolution is 1024xc3x97768.
Please refer to FIG. 4. FIG. 4 is a timing diagram of the video frame signals and pixel clocks 40. At a resolution of 800xc3x97600, the display device 12 uses a phase locked loop to generate roughly 800 pixel clocks 40 at a predetermined frequency to sample the video signals 16. The sampled video signals are then temporarily stored in an image buffer (not shown), and the LCD monitor or the projector will display the sampled video signals in the image buffer on a screen.
However, display cards in computers may be made by different manufacturers. When a poor quality display card is used, the frequency of the horizontal synchronization signals 14 transmitted to the display device 12 may be beyond a predetermined range, thus the display device 12 cannot correctly detect the corresponding resolution by checking the sampling reference table. The resolution of the display device then has to be adjusted manually. This is very inconvenient for users.
It is therefore a primary objective of the present invention to provide a display device which is able to adjust the resolution automatically to solve the above mentioned problem.
In a preferred embodiment, the present invention provides a display device for displaying video frame signals transmitted from a computer. The video frame signals include a plurality of vertical synchronization signals, horizontal synchronization signals and video signals. The display device comprises:
a screen for displaying a video picture formed by a plurality of video signals;
a displaying circuit for processing the video frame signals transmitted from the computer and displaying the video signals on the screen, the displaying circuit comprising a phase locked loop for generating pixel clocks for sampling the video signals;
a first counter for counting the number of horizontal synchronization signals between two vertical synchronization signals when video signals are active, which equals to the number of horizontal scanning lines displayed on the screen; and
a control circuit for adjusting the frequency of the pixel clocks generated by the phase locked loop according to the number of horizontal scanning lines generated by the first counter so that the displaying circuit can correctly sample the video signals according to the pixel clocks generated by the phase locked loop.
It is an advantage of the present invention that the frequency of the pixel clocks generated by the phase locked loop is automatically adjusted according to the number of horizontal scanning lines generated by the first counter so that the displaying circuit can correctly sample the video signals according to the pixel clocks generated by the phase locked loop.
This and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiment which is illustrated in the various figures and drawings.